What You Do At AMD Changes Everything
At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies - building blocks for gaming, immersive platforms, and the data center.
Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the extra mile to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to take a look at the opportunities available to come join our team. Low-Power IP Design Verification Engineer - 137241
AMD's Low Power Advanced Development team is seeking talented, self-motivated individuals to help develop low power innovations that enable industry-leading power efficient computing and graphics products. We have openings for R&D engineers focusing on pre-silicon IP design verification and serving as key contributors in small project teams working on low power advanced development projects.Key Responsibilities
- Work closely with design and architecture teams to scope the verification tasks and make it happen
- Responsible for all aspects of verification including RTL verification, formal verification, Coverage.
- Develop and execute on verification test plans at various levels of design hierarchy including unit and full-chip environments
- Develop high level language testbench components including stimulus drivers, BFMs, behavioral models, monitors and checkers
- Develop, simulate and debug directed and random stimulus and assembly level tests to find bugs in the low power IP design; verify the functionality and verify conformance to the spec
- Develop and analyze assertions and coverage terms. Participate in technical reviews of the specifications, design, and test plans. Identify and address areas of concern to meet design quality objectives.
- Develop tools, infrastructure, processes and flows to enable functional verification
- Maintain and improve existing functional verification infrastructure and methodology.
- When presented with Silicon issues, replicate in the pre-silicon environment, and provide debug expertise to root cause the issue and ensure complete validation
- Contribute towards and drive as needed pre-silicon and/or post-silicon verification of IP architectural and microarchitectural features
- Drive project deliverables and dependencies with IP Architects, RTL designers, and Physical Design engineers.
- Ensure the design is bug free
- Hands-on experience in UVM, System Verilog logic, Verilog design and verification
- Hands-on experience in Formal Verification and related tools
- Hands-on experience with low power design and power analysis flows
- Familiar with languages like Perl, python, C/C++ etc.
- Analog-Digital co-simulation experience is a plus
- Experience in modeling hardware designs in emulators or FPGAs
- Background in power conversion and delivery for digital logic device, ideally x86 CPUs or GPUs, is a plus
- Familiarity with digital logic power management techniques (clock gating, power gating, V-F curves, on-die voltage regulation, clock integrity, etc.)
- Hardware debug methods and tools
- Experience and/or familiarity in Design-for-Debug techniques and architectures is preferred
- Work well with others in a team environment
Santa Clara, CA; Austin, TX; other locations available Requisition Numbe r:
United States State:
Santa ClaraJob Function: Design
AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.